BIT Second Semester Microprocessor and Computer Architecture Syllabus, Notes, Model Questions
Course Title: Microprocessor and Computer Architecture
Course No: BIT151
Nature of the Course: Theory + Lab
Semester: II
Course Description:
This course aims at providing fundamental knowledge about computer architecture, instruction cycle, components of microprocessor, Intel 8085 and assembly programming.
Course Objectives:
The main objective of this course is to provide basic knowledge of components of microprocessor, block diagram and assembly language programming using Intel 8085, SAP1 and SAP2 computer architecture, timing diagrams, instruction cycles, machine cycles, control unit, central processing unit, RISC, CISC, Direct Memory Access, interrupts, serial and parallel interfaces.
Course Contents:
Unit 1: Introduction to Microprocessor (6 Hrs.)
1.1 Definition of Microprocessor Components : Registers, ALU, Control and Timing, System Buses (Address, Data, Control), Microprocessor System with Bus Organization
1.2 SAP-1 Architecture: Block Diagram, and Function of each Block SAP-1 Instructions :LDA, ADD, SUB, OUT, HLT Fetch and Execution Cycle of SAP-1 Instructions with Timing Diagram
• Fetch Cycle: Address State, Increment State, Memory State
• Execution Cycle of LDA only
1.3 SAP-2 Architecture: Block Diagram and Functions of each Block, Architectural Differences with SAP-1
➢ Bidirectional Registers
➢ Flags
Unit 2: Intel 8085 (8 Hrs.)
2.1 Functional Block Diagram, Pin Configuration, Description of each Block: Registers, Flag(Description of each Flag), Data and Address Bus including Bidirectional Address/Data Bus, Timing and Control Unit, Interrupts (Introduction Only), Instructions: Op-Code and Operands Addressing Modes, Instructions and Data Flow
2.2 8085 Instructions: Data Transfer:- MOV, IN, OUT, STA,LDA, LXI, LDAX, STAX, XCHG Arithmetic and Logic:- ADD, SUB, INR, DCR, AND, OR, XOR, CMP, RLC, RRC, RAL, RAR Branching:- JMP, JNZ, JZ, JNC, JC
2.3 Basic Assembly Language Programming using 8085 Instruction Sets Addition, Subtraction, Multiplication and Division, Simple Sequence Programs, Array Searching and Sorting using Branching and Looping, Conversion (BCD to ASCII )
Unit 3: Micro Operations (3 Hrs)
3.1 Arithmetic Micro Operations: Addition, Subtraction, Increment, Decrement, Hardware Implementation
3.2 Logic Micro Operations: AND, OR, NOT,NAND,NOR,XOR, Selective Set, Set(preset), selective Complement(toggling) ,Insert, Hardware Implementation
3.3 Shift Micro Operations: Logical, Circular and Arithmetic, Arithmetic Logic Shift Unit
Unit 4: Control Unit and Central Processing Unit (9 Hrs.)
4.1 Control Unit of Basic Computer and Timing Signal (Hardwired Vs. Microprogrammed )
4.2 Micro-operation, Micro-instruction, Micro-program: Symbolic and Binary Micro-program (FETCH and ADD)
4.3 Architecture of Basic Computer: Register organization, Common Bus System Instruction Format, Register Stack and Memory Stack
4.4 Data Transfer operations and Manipulation (Arithmetic, Logical, Shift)
4.5 Introduction to RISC and CISC (Basic Differences)
Unit 5: Fixed point Computer Arithmetic ( 5 Hrs.)
5.1 Signed number Representation: Signed Magnitude, 1’s Complement and 2’s Complement Form
5.2 Addition and Subtraction(with Numerical Example), Addition and Subtraction with Signed Magnitude Data, Hardware implementation, Hardware Algorithm, Addition and Subtraction with Signed 2’s Complemented Data
5.3 Multiplication Algorithm: Hardware Implementation for Signed Magnitude Data, Booth Multiplication Algorithm (with Numerical Example)
5.4 Division Algorithm: Hardware Implementation for Signed Magnitude Data, Hardware Algorithm (Restoring Only)
Unit 6: Input and Output Organization
6.1 Introduction to Peripheral Devices, I/O interface-I/O bus and Interface Modules, Isolated versus Memory Mapped I/O
6.2 Direct Memory Access (DMA): Introduction, Basic DMA Procedures (DMA controller only)
6.3 I/O Processor, Data Communication Processor: Character Oriented Protocol and Bit Oriented Protocol
Unit 7: Memory Organization
7.1 Hierarchy of Memory System
7.2 Primary Memory: RAM and ROM, Memory Address Map with examples of Address Decoding. Secondary Memory: Structure of Magnetic Disk
7.3 Virtual Memory: Concept, Address Mapping with Pages, Basic Idea about Page Fault and page Replacement
7.4 Memory Management Hardware: Segmented Page Mapping (Introduction) , Memory Protection
Unit 8: Pipelining
8.1 Concept of Pipelining and Flynn’s Classification, Pipelining Example with Speed Up Ratio
8.2 Arithmetic Pipeline , Pipeline for Floating-point Addition and Subtraction
8.3 Instruction Pipeline: Four Segment Instruction Pipeline
8.4 Data Dependency, Handling of Branch Instruction
Laboratory Works:
The laboratory works should be carried out in 8085 trainer kit. The programming should include arithmetic operation, base conversion, conditional branching etc.
Kits
1. Data swap and data transfer programs
2. 8 bit addition and subtraction
3. 16 bit addition and subtraction
4. 8 bit division and multiplication
Kit/Simulator
5. Series generation : odd-even, multiples of integers
6. BCD to ASCII
7. Searching largest/smallest value in an array
8. Ascending/ Descending sorting of array
9. Program involving bitwise AND, bitwise OR, bitwise X-OR, RLC, RRC
Text Books:
1. Ramesh S. Gaonkar: Microprocessor Architecture, Programming, and Applications with 8085, prentice Hall
2. Morris Mano: Computer system Architecture, Third Edition, prentice Hall
Reference Books:
1. Malvino: Digital Computer system Electronics (An introduction to Microcomputers)
2. Douglas V. Hall: Microprocessor and Interfacing programming and Hardware, McGraw Hill
